In SiC power semiconductor devices, which are being put to practical use around the world, there is a growing demand for the development of new technology that overcomes fundamental problems stemming from the physical properties of SiC.
The new power semiconductor device (CHESS-MOS®) invented and commercialized by CUSIC Corporation (Sendai, Japan; CEO: Hiroyuki Nagasawa) is a promising candidate for such a new technology, which is characterized by a hybrid structure of 3C-SiC and 4H-SiC substrates with different crystal structures and physical properties.
Associate Prof. Masao Sakuraba Prof. Shigeo Sato (RIEC), Specially Appointed Prof. Yasuo Cho (NICHe) and CUSIC Corporation have successfully fabricated 3C-SiC and 4H-SiC stacked hybrid structure substrates using the Simultaneous Lateral Epitaxy Simultaneous Lateral Epitaxy method.
Furthermore, the density of interfacial levels on the surface of the hybrid structure substrate with insulating film was measured by the Scanning Nonlinear Dielectric Microscopy method, and the density on the 3C-SiC surface was significantly reduced to less than 1/200th of that on the 4H-SiC surface.
These factors not only significantly improve the long-term reliability of SiC power MOSFET devices, but also reduce power loss by more than 30%, which is expected to make a significant contribution to both higher performance and the creation of new functions and energy savings in systems using SiC power semiconductor devices.
The research results were presented at the International Conference on Silicon Carbide and Related Materials (ICSCRM2023) held in Italy on September 18-22, 2023, and at the 84th Applied Physics Fall Meeting (Kumamoto, Japan, September 19-22, 2023). The result will also be presented at the international conference MRS Fall Meeting & Exhibit (November 26 – December 1, 2023, USA).
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